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| ? 2008 microchip technology inc. ds21455d-page 1 tc7106/a/tc7107/a features: ? internal reference with low temperature drift: - tc7106/tc7107: 80 ppm/c (typical) - tc7106a/tc7107a: 20 ppm/c (typical) ? drives lcd (tc7106) or led (tc7107) display directly ? zero reading with zero input ? low noise for stable display ? auto-zero cycle eliminates need for zero adjustment ? true polarity indication for precision null applications ? convenient 9v battery operation (tc7106a) ? high-impedance cmos differential inputs: 10 12 ? differential reference inputs simplify ratiometric measurements ? low-power operation: 10 mw applications: ? thermometry ? bridge readouts: strain gauges, load cells, null detectors ? digital meters: voltage/current/ohms/power, ph ? digital scales, process monitors ? portable instrumentation general description: the tc7106a and tc7107a 3-1/2 digit direct display drive analog-to-digital converters allow existing tc7106/tc7107 based system s to be upgraded. each device has a precision reference with a 20 ppm/c maximum temperature coefficient. this represents a 4 to 7 times improvement over similar 3-1/2 digit converters. existing tc7106 and tc7107 based systems may be upgraded wi thout changing external passive component values. the tc7107a drives common anode light emitting diode (led) displays directly with 8 ma per segment. a low cost, high resolution indicating meter requires only a display, four resistors, and four capacitors. the tc7106a low-power drain and 9v battery operation make it suitable for por- table applications. the tc7106a/tc7107a reduces linearity error to less than 1 count. rollover error ? the difference in readings for equal magnitude, but opposite polarity input signals, is below 1 count. high-impedance differential inputs offer 1 pa leakage current and a 10 12 input impedance. the differential reference input allows ratiometric measurements for ohms or bridge transducer measurements. the 15 v p?p noise performance ensures a ?rock solid? reading. the auto- zero cycle ensures a zero display reading with a zero volts input. 3-1/2 digit analog-to-digital converters
tc7106/a/tc7107/a ds21455d-page 2 ? 2008 microchip technology inc. package type tc7106acpl tc7107aipl 1 2 3 4 osc1 5 6 7 8 9 10 11 12 test v ref + analog common c az v+ d 2 normal pin configuration 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 c 2 b 2 a 2 f 2 e 2 d 3 b 3 f 3 e 3 ab 4 (minus sign) 10s ' 100s ' 1000s ' (7106a/7107a) 100s ' osc2 osc3 v ref - c ref - c ref - v in + v in - v buff v int v- g 2 c 3 a 3 g 3 bp/gnd pol d 1 c 1 b 1 a 1 f 1 g 1 e 1 1s ' 27 26 25 24 23 7 8 9 10 11 nc g 2 nc nc test osc3 nc osc2 osc1 v+ d 1 c 1 b 1 12 13 14 15 16 17 18 19 20 21 22 38 37 36 35 34 ref hi a 1 f 1 tc7106ackw tc7107ackw 39 40 41 42 43 44 28 29 30 31 32 33 6 5 4 3 2 1 ref lo c ref c ref com in hi in lo a/z buff int v- g 1 e 1 d 1 c 1 b 2 a 2 f 2 e 2 d 3 c 3 a 3 g 3 bp/gnd pol ab 4 e 3 f 3 b 3 33 32 31 30 29 13 14 15 16 17 ref lo c ref f 1 g 1 e 1 d 2 c 2 b 2 a 2 f 2 e 2 d 2 18 19 20 21 22 23 24 25 26 27 28 44 43 42 41 40 a 1 b 3 f 3 tc7106aclw tc7107aclw 1 2 3 4 5 6 34 35 36 37 38 39 12 11 10 9 8 7 b 1 c 1 d 1 v + nc osc1 osc2 osc3 test ref hi e 3 ab 4 pol nc bp/gnd g 3 a 3 c 3 g 2 c ref common in hi nc in lo a/z buff int v- 40-pin pdip 44-pin plcc 44-pin mqfp ? 2008 microchip technology inc. ds21455d-page 3 tc7106/a/tc7107/a typical application v ref + tc7106/a tc7107 /a 9v v ref 33 34 24 k 1k 29 36 39 38 40 0.47 f 0.1 f v- osc1 osc3 osc2 to analog common (pin 32) 3 conversions/sec 200 mv full scale c osc 100 k 47 k 0.22 f c ref - c ref + v in + v in - analog common v int v buff c az 20 21 segment drive 2 - 19 22 - 25 pol bp v+ minus sign backplane drive 28 r osc 100 pf lcd display (tc7106/a) or common node with led display (tc7107/a) 27 100 mv 1 26 35 v ref - + 31 0.01 f analog input + ? 1m 30 32 tc7106/a/tc7107/a ds21455d-page 4 ? 2008 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings? tc7106a supply voltage (v+ to v-) ..................................................15v analog input voltage (either input) (note 1) .............. v+ to v- reference input voltage (either input) ....................... v+ to v- clock input .............................................................. test to v+ package power dissipation (t a 70c) (note 2) : 40-pin pdip ......................................................1.23w 44-pin plcc.....................................................1.23w 44-pin mqfp ....................................................1.00w operating temperature range: c (commercial) devices........................0c to +70c i (industrial) devices ..........................-25c to +85c storage temperature range .........................-65c to +150c tc7107a supply voltage (v+) .......................................................... +6v supply voltage (v-) ............................................................-9v analog input voltage (either input) (note 1) .............. v+ to v- reference input voltage (either input)....................... v+ to v- clock input............................................................. gnd to v+ package power dissipation (t a 70c) (note 2) : 40-pin pdip...................................................... 1.23w 44-pin plcc .................................................... 1.23w 44-pin mqfp.................................................... 1.00w operating temperature range: c (commercial) devices ....................... 0c to +70c i (industrial) devices.......................... -25c to +85c storage temperature range......................... -65c to +150c ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. exposure to absolute maximum rat- ing conditions for extended perio ds may affect device reliability. tc7106/a and tc7107/a elec trical specifications electrical characteristics: unless otherwise noted, specifications apply to both the tc7106/tc7106a and tc7107/tc7107a at t a = +25c, f clock = 48 khz. parts are tested in the circ uit of the typical operating circuit. parameter symbol min typ max unit test conditions zero input reading z ir -000.0 000.0 +000.0 digital reading v in = 0.0v full scale = 200.0 mv ratiometric reading 999 999/1000 1000 digital reading v in = v ref v ref = 100 mv rollover error (difference in reading for equal positive and negative reading near full scale) r/o -1 0.2 +1 counts v in - = + v in + ? 200 mv linearity (maximum deviation from best straight line fit) -1 0.2 +1 counts full scale = 200 mv or full scale = 2.000v common mode rejection ratio (note 3) cmrr ? 50 ? v/v v cm = 1v, v in = 0v, full scale = 200.0 mv noise (peak to peak value not exceeded 95% of time) e n ?15?vv in = 0v full scale - 200.0 mv leakage current at input i l ? 1 10 pa v in = 0v zero reading drift ? 0.2 1 v/c v in = 0v ?c? device = 0c to +70c ?1.0 2v/cv in = 0v ?i? device = -25c to +85c scale factor temperature coefficient tc sf ? 1 5 ppm/c v in = 199.0 mv, ?c? device = 0c to +70c (ext. ref = 0 ppmc) ? ? 20 ppm/c v in = 199.0 mv ?i? device = -25c to +85c supply current (does not include led current for tc7107/a) i dd ?0.81.8mav in = 0.8 analog common voltage (with respect to positive supply) v c 2.7 3.05 3.35 v 25 k between common and positive supply note 1: input voltages may exceed the supply voltages, prov ided the input current is limited to 100 a. 2: dissipation rating assumes devic e is mounted with all leads soldered to printed circuit board. 3: refer to ?differential input? discussion. 4: backplane drive is in phase with segm ent drive for ?off? segment, 180 out of phase for ?on? segment. frequency is 20 times the conversion rate. average dc component is less than 50 mv. ? 2008 microchip technology inc. ds21455d-page 5 tc7106/a/tc7107/a temperature coefficient of analog common (with respect to positive supply) v ctc ????25k between common and positive supply 7106/7/a 7106/7 20 80 50 ? ppm/c ppm/c 0c t a +70c (?c? commercial temperature range devices) temperature coefficient of analog common (with respect to positive supply) v ctc ? ? 75 ppm/c 0c t a +70c (?i? industrial temperature range devices) tc7106a only peak to peak segment drive voltage v sd 4 5 6 v v+ to v- = 9v (note 4) tc7106a only peak to peak backplane drive voltage v bd 4 5 6 v v+ to v- = 9v (note 4) tc7107a only segment sinking current (except pin 19) 5 8.0 ? ma v+ = 5.0v segment voltage = 3v tc7107a only segment sinking current (pin 19) 10 16 ? ma v+ = 5.0v segment voltage = 3v tc7106/a and tc7107/a electrical specifications (continued) electrical characteristics: unless otherwise noted, spec ifications apply to both the tc7106/tc7106a and tc7107/tc7107a at t a = +25c, f clock = 48 khz. parts are tested in the circ uit of the typical operating circuit. parameter symbol min typ max unit test conditions note 1: input voltages may exceed the supply voltages, prov ided the input current is limited to 100 a. 2: dissipation rating assumes devic e is mounted with all leads soldered to printed circuit board. 3: refer to ?differential input? discussion. 4: backplane drive is in phase with segm ent drive for ?off? segment, 180 out of phase for ?on? segment. frequency is 20 times the conversion rate. average dc component is less than 50 mv. tc7106/a/tc7107/a ds21455d-page 6 ? 2008 microchip technology inc. 2.0 pin descriptions the descriptions of the pins are listed in table 2-1 . table 2-1: pin function table pin number (40-pin pdip) normal pin no. (40-pin pdip) (reversed symbol description 1 (40) v+ positive supply voltage. 2 (39) d 1 activates the d section of the units display. 3 (38) c 1 activates the c section of the units display. 4 (37) b 1 activates the b section of the units display. 5 (36) a 1 activates the a section of the units display. 6 (35) f 1 activates the f section of the units display. 7 (34) g 1 activates the g section of the units display. 8 (33) e 1 activates the e section of the units display. 9 (32) d 2 activates the d section of the tens display. 10 (31) c 2 activates the c section of the tens display. 11 (30) b 2 activates the b section of the tens display. 12 (29) a 2 activates the a section of the tens display. 13 (28) f 2 activates the f section of the tens display. 14 (27) e 2 activates the e section of the tens display. 15 (26) d 3 activates the d section of the hundreds display. 16 (25) b 3 activates the b section of the hundreds display. 17 (24) f 3 activates the f section of the hundreds display. 18 (23) e 3 activates the e section of the hundreds display. 19 (22) ab 4 activates both halves of the 1 in the thousands display. 20 (21) pol activates the negative polarity display. 21 (20) bp/gnd lcd backplane drive output (tc7106a). digital ground (tc7107a). 22 (19) g 3 activates the g section of the hundreds display. 23 (18) a 3 activates the a section of the hundreds display. 24 (17) c 3 activates the c section of the hundreds display. 25 (16) g 2 activates the g section of the tens display. 26 (15) v- negative power supply voltage. 27 (14) v int integrator output. connection point for in tegration capacitor. see integrating capacitor section for more details. 28 (13) v buff integration resistor connection. use a 47 k resistor for a 200 mv full scale range and a 47 k resistor for 2v full scale range. 29 (12) c az the size of the auto-zero capacitor influen ces system noise. use a 0.47 f capacitor for 200 mv full scale, and a 0.047 f capacitor for 2v full scale. see section 7.1 ?auto-zero capacitor (caz)? on auto-zero capacitor for more details. 30 (11) v in - the analog low input is connected to this pin. 31 (10) v in + the analog high input signal is connected to this pin. 32 (9) analog common this pin is primarily used to set the analog common mode voltage for battery operation or in systems where the input si gnal is referenced to the power supply. it also acts as a reference voltage source. see section 8.3 ?analog common (pin 32)? on analog common for more details. 33 (8) c ref - see pin 34. 34 (7) c ref + a 0.1 f capacitor is used in most applications. if a large common mode voltage exists (for example, the v in - pin is not at analog common), and a 200 mv scale is used, a 1 f capacitor is recommended and will hold the rollover error to 0.5 count. 35 (6) v ref - see pin 36. ? 2008 microchip technology inc. ds21455d-page 7 tc7106/a/tc7107/a 36 (5) v ref + the analog input required to generate a full scale output (1999 counts). place 100 mv between pins 35 and 36 for 199.9 mv full scale. place 1v between pins 35 and 36 for 2v full scale. see paragraph on reference voltage. 37 (4) test lamp test. when pulled high (to v+) all segments will be turned on and the display should read -1888. it may also be used as a negative supply for externally generated decimal points. see paragraph under test for additional information. 38 (3) osc3 see pin 40. 39 (2) osc2 see pin 40. 40 (1) osc1 pins 40, 39, 38 make up the oscillator section. for a 48 khz clock (3 readings per section), connect pin 40 to the junction of a 100 k resistor and a 100 pf capacitor. the 100 k resistor is tied to pin 39 and t he 100 pf capacitor is tied to pin 38. table 2-1: pin function table (continued) pin number (40-pin pdip) normal pin no. (40-pin pdip) (reversed symbol description tc7106/a/tc7107/a ds21455d-page 8 ? 2008 microchip technology inc. 3.0 detailed description ( all pin designations refer to 40-pin pdip. ) 3.1 dual slope conversion principles the tc7106a and tc7107a ar e dual slope, integrating analog-to-digital converters. an understanding of the dual slope conversion technique will aid in following the detailed operation theory. the conventional dual slope converter measurement cycle has two distinct phases: ? input signal integration ? reference voltage inte gration (de-integration) the input signal being converted is integrated for a fixed time period (t si ). time is measured by counting clock pulses. an opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. the reference integration time is directly proportional to the input signal (t ri ). see figure 3-1 . figure 3-1: basic dual slope converter. in a simple dual slope converter, a complete conversion requires the integrator output to ?ramp-up? and ?ramp-down.? a simple mathematical equation relates the input signal, reference voltage and integration time. equation 3-1: for a constant v in : equation 3-2: the dual slope converter accuracy is unrelated to the integrating resistor and capacitor values as long as they are stable during a measurement cycle. an inherent benefit is noise immunity. noise spikes are integrated or averaged to ze ro during the integration periods. integrating adcs are immune to the large conversion errors that plague successive approximation converters in high noise environments. interfering signals with frequency components at multiples of the averaging period will be attenuated. integrating adcs commonly operate with the signal integration period set to a multiple of the 50/60hz power line period (see figure 3-2 ). figure 3-2: normal mode rejection of dual slope converter. + ? ref voltage analog input signal + ? display switch driver control logic integrator output counter polarity control phase control v in v ref v in 1/2 v ref variable reference integrate time fixed signal integrate time integrator c comparator +/? where: v r = reference voltage t si = signal integration time (fixed) t ri = reference voltage integration time (variable). 1 rc ------- - v in 0 t si t () dt v r t ri rc -------------- - = v in = v r t ri t si 30 20 10 0 normal mode rejection (db) 0.1/t 1/t 10/t input frequency t = measured period where: f osc = clock frequency at pin 38 v fs = full scale input voltage r int = integrating resistor v int = desired full scale integrator output swing c int 4000 () 1 f osc ------------ - ?? ?? v fs r int ----------- ?? ?? v int ----------------------------------------------------- - = ? 2008 microchip technology inc. ds21455d-page 9 tc7106/a/tc7107/a 4.0 analog section in addition to the basic signal integrate and de- integrate cycles di scussed, the circuit incorporates an auto-zero cycle. this cycl e removes buffer amplifier, integrator, and comparator offset voltage error terms from the conversion. a true digital zero reading results without adjusting external potentiometers. a complete conversion consists of three cycles: an auto-zero, signal integrate, and reference integrate cycle. 4.1 auto-zero cycle during the auto-zero cycle, the differential input signal is disconnected from the circuit by opening internal analog gates. the internal nodes are shorted to analog common (ground) to establish a zero input condition. additional analog gates close a feedback loop around the integrator and comparator. this loop permits comparator offset voltage error compensation. the voltage level established on c az compensates for device offset voltages. the offset error referred to the input is less than 10 v. the auto-zero cycle length is 1000 to 3000 counts. 4.2 signal integrate cycle the auto-zero loop is entered and the internal differential inputs connect to v in + and v in -. the differential input signal is integrated for a fixed time period. the tc7106/tc7106a signal integration period is 1000 clock periods or co unts. the externally set clock frequency is divided by four before clocking the internal counters. the integration time period is: equation 4-1: the differential input voltage must be within the device common mode range when the converter and measured system share the same power supply common (ground). if the converter and measured system do not share the same power supply common, v in - should be tied to analog common. polarity is determined at the end of signal integrate phase. the sign bit is a true polarity indication, in that signals less than 1 lsb are correctly determined. this allows precision null detection limited only by device noise and auto-zero residual offsets. 4.3 reference integrate phase the third phase is referenc e integrate or de-integrate. v in - is internally connected to analog common and v in + is connected across the previously charged reference capacitor. circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. the time required for the output to return to zero is proportional to the input signal and is between 0 and 2000 counts. the digital reading displayed is: equation 4-2: where: f osc = externally set clock frequency t si 4 f osc ------------ - 1000 = 1000 v in v ref ------------ - = tc7106/a/tc7107/a ds21455d-page 10 ? 2008 microchip technology inc. 5.0 digital section (tc7106a) the tc7106a ( figure 5-2 ) contains all the segment drivers necessary to directly drive a 3-1/2 digit liquid crystal display (lcd). an lcd backplane driver is included. the backplane frequency is the external clock frequency divided by 800. for three conversions per second, the backplane frequency is 60hz with a 5v nominal amplitude. when a segment driver is in phase with the backplane signal, the segment is ?off.? an out of phase segment drive signal causes the segment to be ?on? or visible. this ac drive configuration results in negligible dc voltage across each lcd segment. this insures long lcd display life. the polarity s egment driver is ?on? for negative analog inputs. if v in + and v in - are reversed, this indicator will reverse. when the test pin on the tc7106a is pulled to v+, all segments are turned ?on.? the display reads -1888. during this mode, the lcd segments have a constant dc voltage impressed. do not leave the display in this mode for more than several minutes! lcd disp lays may be destroyed if operated with dc levels for extended periods. the display font and the segment drive assignment are shown in figure 5-1 . figure 5-1: display font and segment assignment in the tc7106a, an internal digital ground is generated from a 6-volt zener diode and a large p channel source follower. this supply is designed to absorb the large capacitive currents when the backplane voltage is switched. display font 1000s ' 100s' 10s' 1s ' ? 2008 microchip technology inc. ds21455d-page 11 tc7106/a/tc7107/a figure 5-2: tc7106a block diagram. tc7106a thousands hundreds tens units 4 39 osc2 v+ test 1 to switch drivers from comparator output clock 40 38 osc3 osc1 control logic 26 500 data latch c ref - r int v+ c az v int 28 29 27 33 36 34 10 ma 31 a/z int az & de () 32 int 26 integrator to digital section de (+) de (?) de (+) de (?) analog common c ref + v in + v in - v buff c int v ref +v ref - a/z c ref + 35 + ? lcd segment drivers 200 backplane f osc v- v th = 1v v- + ? internal digital ground low tem p c o v ref comparator ? a/z v+ ? 3.0v 1 r osc c osc 7 segment decode 7 segment decode 7 segment decode 21 typical segment output segment output v+ 0.5 ma 2ma 6.2v lcd display + ? 37 a/z 30 internal digital ground tc7106/a/tc7107/a ds21455d-page 12 ? 2008 microchip technology inc. 6.0 digital section (tc7107a) figure 6-2 shows a tc7106a block diagram. it is designed to drive common anode leds. it is identical to the tc7106a, except that the regulated supply and backplane drive have been eliminated and the segment drive is typically 8 ma. the 1000?s output (pin 19) sinks current from two led segments, and has a 16 ma drive capability. in both devices, the polarity indication is ?on? for negative analog inputs. if v in - and v in + are reversed, this indication can be reversed also, if desired. the display font is the same as the tc7106a. 6.1 system timing the oscillator frequency is divided by 4 prior to clocking the internal decade counters. the four-phase measurement cycle takes a total of 4000 counts, or 16,000 clock pulses. the 4000-count cycle is indepen- dent of input signal magnitude. each phase of the m easurement cycle has the following length: 1. auto-zero phase: 1000 to 3000 counts (4000 to 12000 clock pulses). for signals less than full scale, the auto-zero phase is assigned the unused reference integrate time period: 2. signal integrate: 1000 counts (4000 clock pulses). this time period is fixed. the integration period is: equation 6-1: 3. reference integrate: 0 to 2000 counts (0 to 8000 clock pulses). the tc7106a/tc7107a are drop-in replacements for the tc7106/tc7107 parts. external component value changes are not required to benefit from the low drift internal reference. 6.2 clock circuit three clocking methods may be used (see figure 6-1 ): 1. an external oscillator connected to pin 40. 2. a crystal between pins 39 and 40. 3. an rc oscillator using all three pins. figure 6-1: clock circuits. where: f osc = externally set clock frequency t si 4 f osc ------------ - 1000 = tc7106a tc7107a 4 crystal rc network 40 38 ext osc 39 to test pin on tsc7106a to gnd pin on tsc7107a to counter ? 2008 microchip technology inc. ds21455d-page 13 tc7106/a/tc7107/a figure 6-2: tc7107a block diagram. tc7107a thousands hundreds tens units 4 39 osc2 v+ 1 to switch drivers from comparator output clock 7 segment decode 40 38 osc3 osc1 logic control data latch c ref - r int v+ c az v int 28 29 27 33 36 34 10 ma 31 a/z int az & de () 32 int 26 integrator to digital section de (+) de (?) de (+) de (?) analog common c ref + v in + v in - v buff c int v ref + v ref - c ref + 35 + ? lcd segment drivers f osc v- + ? digital ground low tem p c o v ref comparator ? a/z v+ ? 3.0v 1 r osc c osc 7 segment decode 7 segment decode typical segment output internal digital ground segment output v+ 0.5 ma 8ma led display + ? a/z 30 digital ground test 21 37 500 tc7106/a/tc7107/a ds21455d-page 14 ? 2008 microchip technology inc. 7.0 component value selection 7.1 auto-zero capacitor (c az ) the c az capacitor size has some influence on system noise. a 0.47 f capacitor is recommended for 200 mv full scale applications where 1lsb is 100 v. a 0.047 f capacitor is adequate for 2.0v full scale applications. a mylar type dielectric capacitor is adequate. 7.2 reference voltage capacitor (c ref ) the reference voltage used to ramp the integrator out- put voltage back to zero during the reference integrate cycle is stored on c ref . a 0.1 f capacitor is acceptable when v in - is tied to analog common. if a large common mode voltage exists (v ref - ? analog common) and the application requires 200 mv full scale, increase c ref to 1.0 f. rollover error will be held to less than 1/2 count. a mylar dielectric capacitor is adequate. 7.3 integrating capacitor (c int ) c int should be selected to maximize the integrator output voltage swing without causing output saturation. due to the tc7106a/tc7107a superior temperature coefficient specification, analog common will normally supply the differential voltage reference. for this case, a 2v full scale integrator output swing is satisfactory. for 3 readings/second (f osc = 48 khz), a 0.22 f value is suggested. if a different oscillator frequency is used, c int must be changed in inverse proportion to maintain the nominal 2v integrator swing. an exact expression for c int is: equation 7-1: c int must have low dielectric absorption to minimize rollover error. a polypropylene capacitor is recommended. 7.4 integrating resistor (r int ) the input buffer amplifier and integrator are designed with class a output stages. the output stage idling current is 100 a. the integrator and buffer can supply 20 a drive currents with negligible linearity errors. r int is chosen to remain in the output stage linear drive region, but not so large t hat printed circuit board leakage currents induce errors. for a 200 mv full scale, r int is 47 k . 2.0v full scale requires 470 k . table 7-1: component values and nominal full scale voltage 7.5 oscillator components r osc (pin 40 to pin 39) should be 100 k . c osc is selected using the equation: equation 7-2: note that f osc is divided by four to generate the tc7106a internal control clock. the backplane drive signal is derived by dividing f osc by 800. to achieve maximum rejection of 60 hz noise pickup, the signal integrate period should be a multiple of 60 hz. oscillator frequencies of 240 khz, 120 khz, 80 khz, 60 khz, 48 khz, 40 khz, etc. should be selected. for 50 hz rejection, oscillator frequencies of 200 khz, 100 khz, 66-2/3 khz, 50 khz, 40 khz, etc. would be suitable. note that 40 khz (2.5 readings/ second) will reject both 50 hz and 60 hz. 7.6 reference voltage selection a full scale reading (2000 counts) requires the input signal be twice the reference voltage. where: f osc = clock frequency at pin 38 v fs = full scale input voltage r int = integrating resistor v int = desired full scale integrator output swing c int 4000 () 1 f osc ------------ - ?? ?? v fs r int ----------- ?? ?? v int ----------------------------------------------------- - = component value nominal full scale voltage 200.0 mv 2.000v c az 0.47 f 0.047 f r int 47 k 470 k c int 0.22 f 0.22 f note: f osc = 48 khz (3 readings per sec). required full scale voltage* v ref 200.0 mv 100.0 mv 2.000v 1.000v *v fs = 2v ref f osc 0.45 rc --------- - = where: f osc =48khz c osc = 100 pf ? 2008 microchip technology inc. ds21455d-page 15 tc7106/a/tc7107/a in some applications, a scal e factor other than unity may exist between a transducer output voltage and the required digital reading. assume, for example, a pressure transducer output is 400 mv for 2000 lb/in 2 . rather than dividing the input voltage by two, the reference voltage should be set to 200 mv. this permits the transducer input to be used directly. the differential reference can also be used when a digital zero reading is required when v in is not equal to zero. this is common in temperature measuring instrumentation. a compensating offset voltage can be applied between analog common and v in -. the transducer output is connected between v in + and analog common. the internal voltage reference potential available at analog common will normally be used to supply the converter?s reference. this potential is stable whenever the supply potential is greater than approximately 7v. in applications where an externally generated reference voltage is desired, refer to figure 7-1 . figure 7-1: external reference. tc7106a tc7107a 6.8v zener i z v+ v+ v+ 1.2v ref common tc7106a tc7107a 6.8 k 20 k v ref + v ref - v ref + v ref - (a) (b) v+ tc7106/a/tc7107/a ds21455d-page 16 ? 2008 microchip technology inc. 8.0 device pin functional description 8.1 differential signal inputs v in + (pin 31), v in - (pin 30) the tc7106a/tc7107a is designed with true differential inputs and accepts input signals within the input stage common mode voltage range (v cm ). the typical range is v+ ? 1.0 to v+ + 1v. common mode voltages are removed from the system when the tc7106a/tc7107a operates from a battery or floating power source (isolated from measured system) and v in - is connected to analog common (v com ) (see figure 8-2 ). in systems where common mode voltages exist, the 86 db common mode rejection ratio minimizes error. common mode voltages do, however, affect the integrator output level. integrator output saturation must be prevented. a worst-case condition exists if a large positive v cm exists in conjunction with a full scale negative differential signal. the negative signal drives the integrator output positive along with v cm (see figure 8-1 ). for such applicati ons the integrator output swing can be reduced below the recommended 2.0v full scale swing. the integrat or output will swing within 0.3v of v+ or v- without increasing linearity errors. figure 8-1: common mode voltage reduces available integrator swing (v com v in ). 8.2 differential reference v ref + (pin 36), v ref - (pin 35) the reference voltage can be generated anywhere within the v+ to v- power supply range. to prevent rollover type errors being induced by large common mode voltages, c ref should be large compared to stray node capacitance. the tc7106a/tc7107a circuits have a significantly lower analog common temperature coefficient. this gives a very stable voltage suitable for use as a reference. the temperature coefficient of analog common is 20 ppm/c typically. 8.3 analog common (pin 32) the analog common pin is set at a voltage potential approximately 3.0v below v+ . the potential is between 2.7v and 3.35v below v+. analog common is tied internally to the n channel fet capable of sinking 20 ma. this fet will hold the common line at 3.0v should an external load attempt to pull the common line toward v+. analog common source current is limited to 10 a. analog common is, therefore, easily pulled to a more negative voltage (i.e., below v+ ? 3.0v). the tc7106a connects the internal v in + and v in - inputs to analog common during the auto-zero cycle. during the reference integrate phase, v in - is connected to analog common. if v in - is not externally connected to analog common, a common mode voltage exists. this is rejected by the converter?s 86 db common mode rejection ratio. in battery operation, analog common and v in - are usually connected, removing common mode voltage concerns. in systems where v- is connected to the power supply ground, or to a given voltage, analog common should be connected to v in -. r i + ? v in v cm c i integrator v i = [ [ v cm ? v in input buffer c i = integration capacitor r i = integration resistor 4000 f osc t i = integration time = where: v i ? + ? + t i r i c i ? 2008 microchip technology inc. ds21455d-page 17 tc7106/a/tc7107/a figure 8-2: common mode voltage removed in battery operation with v in - = analog common. the analog common pin serves to set the analog section reference or common point. the tc7106a is specifically designed to operate from a battery, or in any measurement system where input signals are not referenced (float), with respect to the tc7106a power source. the analog common potential of v+ ? 3.0v gives a 6v end of battery life voltage. the common potential has a 0.001% voltage coefficient and a 15 output impedance. with sufficiently high total supply voltage (v+ ? v- > 7.0v), analog common is a very stable potential with excellent temperature stability, typically 20 ppm/c. this potential can be used to generate the reference voltage. an external voltage reference will be unnecessary in most cases because of the 50 ppm/c maximum temperature coefficient. see section 8.5 ?internal voltage reference? . 8.4 test (pin 37) the test pin potential is 5v less than v+. test may be used as the negative power supply connection for external cmos logic. the test pin is tied to the internally generated negati ve logic supply (internal logic ground) through a 500 resistor in the tc7106a. the test pin load should be no more than 1ma. if test is pulled to v+ all segments plus the minus sign will be activated. do not o perate in this mode for more than several minutes with the tc7106a. with test = v+, the lcd segments are impressed with a dc voltage which will destroy the lcd. the test pin will sink about 10 ma when pulled to v+. 8.5 internal voltage reference the analog common voltage temperature stability has been significantly improved ( figure 8-3 ). the ?a? version of the industry standard circuits allow users to upgrade old systems and design new systems without external voltage references. external r and c values do not need to be changed. figure 8-4 shows analog common supplying the necessary voltage reference for the tc7106a/tc7107a. figure 8-3: analog common temperature coefficient. figure 8-4: internal voltage reference connection. v buf c az v int bp pol segment drive osc1 osc3 osc2 v- v+ v ref + v ref - analog common v- v+ v- v+ gnd gnd measured system power source 9v lcd display tc7106a + v in - v in + typical no maximum specified no maximum specified no maximum specified typical typical 200 180 160 140 120 100 80 60 40 20 0 temperature coefficient (ppm/ c) icl7136 tc 7106a icl7106 maximum limit v- analog common tc7106a tc7107a v ref + 32 35 36 24k 1k v ref - v ref 1 set v ref = 1/2 v full scale v+ tc7106/a/tc7107/a ds21455d-page 18 ? 2008 microchip technology inc. 9.0 power supplies the tc7107a is designed to work from 5v supplies. however, if a negative supply is not available, it can be generated from the clock output with two diodes, two capacitors, and an inexpensive ic ( figure 9-1 ). figure 9-1: generating negative supply from +5v. in selected applications a negative supply is not required. the conditions to use a single +5v supply are: ? the input signal can be referenced to the center of the common mode range of the converter. ? the signal is less than 1.5v. ? an external reference is used. the tsc7660 dc-to-dc converter may be used to generate -5v from +5v ( figure 9-2 ). figure 9-2: negative power supply generation with tc7660. 9.1 tc7107 power dissipation reduction the tc7107a sinks the led display current and this causes heat to build up in the ic package. if the internal voltage reference is used, the changing chip temperature can cause the display to change reading. by reducing the led common anode voltage, the tc7107a package power dissipation is reduced. figure 9-3 is a curve tracer display showing the relationship between output current and output voltage for a typical tc7107cpl. since a typical led has 1.8 volts across it at 7 ma, and its common anode is connected to +5v, the tc7107a output is at 3.2v (point a on figure 9-3 ). maximum power dissipation is 8.1 ma x 3.2v x 24 segments = 622 mw. figure 9-3: tc7107 output current vs. output voltage. notice, however, that once the tc7107a output voltage is above two volts, the led current is essentially constant as output voltage increases. reducing the output voltage by 0.7v (point b in figure 9-3 ) results in 7.7 ma of led current, only a 5 percent reduction. maximum power dissipation is only 7.7 ma x 2.5v x 24 = 462 mw, a reduction of 26%. an output voltage reduction of 1 volt (point c) reduces led current by 10% (7.3 ma) but power dissipation by 38% (7.3 ma x 2.2v x 24 = 385 mw). reduced power dissipation is very easy to obtain. figure 9-4 shows two ways: either a 5.1 , 1/4w resistor, or a 1a diode placed in series with the display (but not in series with the tc7107a). the resistor will reduce the tc7107a output voltage, when all 24 segments are ?on,? to point ?c? of figure 9-4 . when segments turn off, the output voltage will increase. the diode, on the other hand, will result in a relatively steady output voltage, around point ?b?. tc7107a v+ osc1 osc2 osc3 gnd v- v+ cd4009 0.047 f 1n914 1n914 10 f ? + v- = -3.3v gnd v in - v in v ref + v ref - com +5v led drive 36 1 35 32 31 30 26 v+ v- 21 tc7660 3 10 f + 10 f + 2 8 5 (-5v) tc7107a 4 v in + c b a 6.000 7.000 8.000 9.000 10.000 2.00 2.50 3.00 3.50 4.00 output voltage (v) output current (ma) ? 2008 microchip technology inc. ds21455d-page 19 tc7106/a/tc7107/a in addition to limiting maximum power dissipation, the resistor reduces the change in power dissipation as the display changes. this effect is caused by the fact that, as fewer segments are ?on,? each ?on? output drops more voltage and current. for the best case of six segments (a ?111? display) to worst-case (a ?1888? display), the resistor will change about 230 mw, while a circuit without the resistor will change about 470 mw. therefore, the resistor will reduce the effect of display dissipation on reference voltage drift by about 50%. the change in led brightness caused by the resistor is almost unnoticeable as more segments turn off. if display brightness remaining steady is very important to the designer, a diode may be used instead of the resistor. figure 9-4: diode or resistor limits package power dissipation. tp2 tp5 100 k tp1 24 k 1k 0.1 f tp3 0.01 f + in ? 0.22 f display display 100 pf +5v 1m -5v 150 0.47 f tc7107a 40 tp 4 30 21 20 10 1 47 k 1n4001 5.1 1/4w tc7106/a/tc7107/a ds21455d-page 20 ? 2008 microchip technology inc. 10.0 typical applications 10.1 decimal point and annunciator drive the test pin is connected to the internally generated digital logic supply ground through a 500 resistor. the test pin may be used as the negative supply for external cmos gate segment drivers. lcd display annunciators for decimal points, low battery indication, or function indication may be added without adding an additional supply. no more than 1 ma should be supplied by the test pin; its potential is approximately 5v below v+ (see figure 10-1 ). figure 10-1: decimal point drive using test as logic ground. 10.2 ratiometric resistance measurements the true differential input and differential reference make ratiometric reading possible. typically in a ratiometric operation, an unknown resistance is measured, with respect to a known standard resistance. no accurately defined reference voltage is needed. the unknown resistance is put in series with a known standard and a current passed through the pair. the voltage developed across the unknown is applied to the input and the voltage across the known resistor is applied to the reference input. if the unknown equals the standard, the display will read 1000. the displayed reading can be determined from the following expression: equation 10-1: the display will over range for: r unknown 2 x r standard figure 10-2: low parts count ratiometric resistance measurement. figure 10-3: temperature sensor. tc7106a bp test 37 21 v+ v+ gnd to l c d decimal point to l c d decimal point to l c d backplane 4049 tc7106a decimal point select v+ v+ test gnd 4030 bp displayed (reading) r unknown r standard ----------------------------- 1000 = v ref + v ref - v in + v in - analog common tc7106a lcd display r standard r unknown v+ v+ v- v in - v in + v ref + v ref - common 50 k r 2 160 k 300 k 300k r 1 50 k 1n4148 sensor 9v + tc7106a v fs = 2v ? 2008 microchip technology inc. ds21455d-page 21 tc7106/a/tc7107/a figure 10-4: positive temperature coefficient resistor temperature sensor. figure 10-5: tc7106a, using the internal reference: 200 mv full scale, 3 readings-per- second (rps). figure 10-6: tc7107 internal reference: 200 mv full scale, 3rps, v in - tied to gnd for single ended inputs. figure 10-7: circuit for deve loping under range and over range signals from tc7106a outputs. tc7106a v+ v- v in - v in + v ref + v ref - common 5.6 k 160 k r 2 20 k 1n914 9v r 1 20 k + r 3 0.7%/c ptc 100 k 100 pf 0.47 f 47 k 0.22 f to display to backplane 0.1 f 21 1k 22 k 9v set v ref = 100 mv tc7106a 0.01 f + in 1m ? to p i n 1 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 + ? 100 k 100 pf 0.47 f 47 k 0.22f to display 0.1 f 21 1k 22 k set v ref = 100 mv 0.01 f + in 1m ? to p i n 1 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 -5v +5v tc7107a 21 20 40 to logic v cc v- to logic v cc v+ cd4077 u/r o/r cd4023 or 74c10 tc7106a 1 o/r = over range u/r = under range tc7106/a/tc7107/a ds21455d-page 22 ? 2008 microchip technology inc. figure 10-8: tc7106/tc7107: recommended component values for 2.00v full scale. figure 10-9: tc7107 operated from single +5v supply. figure 10-10: 3-1/2 digit true rms ac dmm. 100 k 100 pf 0.047 f 470 k 0.22 f to display 0.1 f 25 k 24 k v+ set v ref = 1v 0.01 f + in 1m ? v- 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 to p i n 1 tc7106a tc7107a 100pf 0.47 f 47k to display 0.1 f 1k v+ set v ref = 100mv 10k 10k 1.2v 0.01 f ? in 1m 100k 0.22 f 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 tc7107a to p i n 1 + seg drive 47 k 1w 10% + 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ad636 ? 6.8f 0.02 mf 20 k 10% 10 k 1m 1m in4148 1mf ? + 9m 900 k 90 k 10 k 200 mv 2v 20v 200v com v in tc7106a lcd display 24 k 1k 2.2f 0.01 1m 10% 9v + 1 36 35 32 31 30 26 v+ analog common v in + v in - 26 27 29 28 40 38 39 bp v- c1 = 3 - 10 pf variable c2 = 132 pf variable v ref + v ref - v- f ? 2008 microchip technology inc. ds21455d-page 23 tc7106/a/tc7107/a figure 10-11: integrated circuit temperature sensor. tc7106a v ref - common v in + v+ + ? 9v v+ 2 1 4 26 6 5 3 2 3 1 4 8 temperature dependent output nc 1.3k 50 k constant 5v 50 k 51 k 5.1 k r 4 r 5 r 1 r 2 v out = 1.86v @ 25c v in - v fs = 2.00v gnd v- v out adj temp ref02 tc911 v ref + tc7106/a/tc7107/a ds21455d-page 24 ? 2008 microchip technology inc. 11.0 packaging information 11.1 package marking information 44-pin plcc 1 example: 40-pin pdip xxxxxxxxxxx xxxxxxxxxxx xxxxxxxxxxx m *h xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxx yywwnnn example: 44-pin mqfp example: xxxxxxxxxx xxxxxxxxxx yywwnnn m xxxxxxxxxx tc106 ckw ^^0743256 m legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 3 e yywwnnn tc7106 clw m ^^0743256 *h tc7106 cpl^^ 0743256 3 e 3 e ? 2008 microchip technology inc. ds21455d-page 25 tc7106/a/tc7107/a ! ! " # $ # %%&# ' ! #( $")'*$ + , + ! - . # / # $# / # #,00#0# / 1 23 4" ! 5 $23 36$ $(7 3 3 '% %%+ -# ( 8 8 *% $ / -/ ( * 8 9* + ( %* 8 8 : " *9% 8 ;* $ / : " '<* 8 *<% 6 5 ! 9<% 8 %9* -# 5 * 8 %% 5 -/ %%< 8 %* 1##5 : % % 8 %=% 55 : %' 8 % 6 > # + 8 8 =%% n note 1 e1 d 123 a a1 b1 be c eb e l a2 $# - ! %'?%;+ tc7106/a/tc7107/a ds21455d-page 26 ? 2008 microchip technology inc. ! " # $% &' ()()* + ,-* "# # @ a ! ! " # $ # %*# ' ! #( $")'*$ + , + ! - >"., >! # # * . # / # $# / # #,00#0# / 1 $2552$"-"> ! 5 $23 36$ $(7 3 5 3 '' 5 %<%+ 6 4 ( 8 8 '* $ / -/ ( <% %% % ( %%% 8 %* .5 5 %= %<< % .# 5 ;%>". .( %b 8 =b 6 : " %+ 6 5 ! %+ $ / : " %%%+ $ / 5 ! %%%+ 5 -/ % 8 % 5 : %9 8 %'* $ ! ( -# *b 8 ;b $ ! ( + *b 8 ;b e e1 d d1 e n b note 1 1 2 3 note 2 c l a a1 l1 a2 $# - ! %'?%=+ ? 2008 microchip technology inc. ds21455d-page 27 tc7106/a/tc7107/a ./$ .!!! ' 01! .. ! ! " # $ # %%&# ' ! #( $")'*$ . # / # $# / # #,00#0# / 1 23 4" ! 5 $23 36$ $(7 3 3 '' %*% 6 4 ( ;* = <% 4 ( %9% %* % $ / ( %; 8 %< ( %% 8 8 4 %' 8 %'< 4 8 8 %% 4 %' 8 %*; 6 : " ;<* ;9% ;9* 6 5 ! ;<* ;9% ;9* $ / : " ;*% ;* ;*; $ / 5 ! ;*% ;* ;*; .#: " *< ;% ; < .#5 ! *< ;% ; < 5 -/ %%=* 8 %* 1##5 : %; 8 % 55 : % 8 % ch2 x 45 ch1 x 45 ch3 x 45 a1 a3 e2 b1 b a a2 d2 e c note 1 n123 e e1 d d1 $# - ! %'?%'<+ tc7106/a/tc7107/a ds21455d-page 28 ? 2008 microchip technology inc. notes: ? 2008 microchip technology inc. ds21455d-page 29 tc7106/a/tc7107/a appendix a: revision history revision d (february 2008) the following is the list of modifications. 1. updated section 11.0 ?packaging informa- tion? . 2. 3. added appendix a. 4. updated the product identification system page. revision c (april 2006) the following is the list of modifications: ? undocumented changes. revision b (may 2002) the following is the list of modifications: ? undocumented changes. revision a (april 2002) ? original release of this document. tc7106/a/tc7107/a ds21455d-page 30 ? 2008 microchip technology inc. notes: ? 2008 microchip technology inc. ds21455d-page 31 tc7106/a/tc7107/a product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: tc7106: 3-3/4 digit a/d, with frequency counter and probe tc7106a: 3-3/4 digit a/d, with frequency counter and probe tc7106: 3-3/4 digit a/d, with frequency counter and probe tc7107a: 3-3/4 digit a/d, with frequency counter and probe temperature range: c = 0 c to +70 c i= -25 c to +85 c package: lw = plastic leaded chip carrier (plcc), 44-lead pl = plastic dip, (600 mil body), 40-lead kw = plastic metric quad flatpack, (mqfp), 44-lead tape & reel: 713 = tape and reel part no. x x x package temperature range device examples: a) tc7106clw: 3-3/4 a/d converter, 44ld plcc package. b) tc7106cpl: 3-3/4 a/d converter, 40ld pdip package. c) tc7106ckw713: 3-3/4 a/d converter, 44ld mqfp package, tape and reel. a) tc7106aclw: 3-3/4 a/d converter, 44ld plcc package. b) tc7106acpl: 3-3/4 a/d converter, 40ld pdip package. c) TC7106ACKW713: 3-3/4 a/d converter, 44ld mqfp package, tape and reel a) tc7107clw: 3-3/4 a/d converter, 44ld plcc package. b) tc7107clp: 3-3/4 a/d converter, 40ld pdip package. c) tc7107ckw713: 3-3/4 a/d converter, 44ld mqfp package tape and reel. a) tc7107aclw: 3-3/4 a/d converter, 44ld plcc package. b) tc7107aclp: 3-3/4 a/d converter, 40ld pdip package. c) tc7107ackw: 3-3/4 a/d converter, 44ld mqfp package. xx x tape & reel tc7106/a/tc7107/a ds21455d-page 32 ? 2008 microchip technology inc. notes: ? 2008 microchip technology inc. ds21455d-page 33 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pro mate, rfpic and smartshunt are registered trademarks of microchip te chnology incorporated in the u.s.a. and other countries. filterlab, linear active thermistor, mxdev, mxlab, seeval, smartsensor and the embedded control solutions company are registered tradema rks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, a pplication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, in-circuit serial programming, icsp, icepic, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, pickit, picdem, picdem.net, pictail, pic 32 logo, powercal, powerinfo, powermate, powertool, real ice, rflab, select mode, total endurance, uni/o, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2008, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. ds21455d-page 34 ? 2008 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://support.microchip.com web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 kokomo kokomo, in tel: 765-864-8360 fax: 765-864-8387 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8528-2100 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-4182-8400 fax: 91-80-4182-8422 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-572-9526 fax: 886-3-572-6459 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 w orldwide s ales and s ervice 01/02/08 |
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